1. Technical Field
The present invention relates to field-effect transistors in general, and in particular to bi-layer pseudo-spin field-effect transistors.
2. Description of Related Art
For a field-effect transistor (FET), a gate typically controls electrical current that flows between a source and a drain. In a metal-oxide semiconductor field-effect transistor (MOSFET), gate control is achieved by regulating the height of a conduction channel in energy below threshold or through self consistent electrostatics and the number of charge carriers within the conduction channel above a threshold, with the threshold being the point of switching between an ON state and an OFF state of the MOSFET. For a short-channel (i.e., a few tens of nanometers channel length) FET, the injection efficiency of charge carriers into a conduction channel above the threshold is approaching the ideal of unity; only backscattering of some of the carriers to the source due to channel-to-gate dielectric surface roughness or interaction with the vibrational modes of the semiconductor and/or dielectric within the conduction channel may reduce this injection efficiency by a factor of approximately two or less. Thus, the ON state current of a short-channel FET can be quite large.
The switching between the ON and OFF states of a FET is not entirely abrupt. At best, in a limit that can only be closely approached below threshold, the current can be reduced only by one order of magnitude for every 2.3 kBT/q, where kB is the Boltzmann's constant, T is the temperature in degrees Kelvin, and q is the magnitude of the charge of an electron, with kBT/q being approximately 60 mV at room temperature (i.e., 300° K). This limit is a result of thermionic emission into the channel of energetic charge carriers from the high energy tail of the carrier energy distribution in the source. The thermionically-emitted charge carriers represent a critical leakage path for a FET in the OFF state. Thermionic emission is a basic physical mechanism of transport in a FET and cannot be eliminated by changing conduction channel materials or by providing better gate control over the channel barrier height. Even if a FET can be built atom-by-atom exactly as desired, this 2.3 kBT/q per decade (i.e., factor of 10) change in current flow below threshold would still represent the best switching behavior possible for the FET.
Complementary-metal oxide semiconductor (CMOS) logic circuits are designed such that in any logic state under steady-state conditions, there is always one OFF-state transistor connected in series between a supply voltage and ground, so that only OFF-state leakage currents flow under steady-state conditions. Large currents flow only during switching transients in order to charge the gates of subsequent transistors and interconnects quickly. However, in order to minimize power consumption in a CMOS logic circuit in which transistors only switch for a very small fraction of the time on average, transistor ON-OFF current ratios of multiple orders of magnitude (multiple factors of ten) must be achieved for controlling OFF-state power consumption. In order to achieve these ratios subject to the optimal 2.3 kBT/q per decade switching criteria and to provide enough ON-state current to perform switching, an approximately half a Volt change in the gate voltage between the ON and OFF states will be required under normal operating conditions. A lower limit should be reached somewhere around the end of the next decade.
The actual voltage change possible in CMOS circuits is defined by the power supply voltage. However, the energy consumed during switching increases according to the square of the supply voltage. Thus, as device density increases in logic circuits, not only device dimensions have been reduced, supply voltages have also been reduced. The inability to further scale supply voltages beyond this point represents a major hurdle to the continued improvement in speed and energy efficiency of future logic circuits that employ MOSFETs.
Consequently, it would be desirable to provide a new type of transistor.